Manufacturing of an integrated circuit (IC) has been largely driven by the need to increase the density of the integrated circuit formed in a semiconductor device. This is typically accomplished by implementing more aggressive design rules to allow larger density of IC device to be formed. Nonetheless, the increased density of the IC devices, such as transistors, has also increased the complexity of processing semiconductor devices with the decreased feature sizes.
For example, as semiconductor devices, such as fin field effect transistor (FinFET), is scaled down through various technology nodes, strained source/drain features (e.g., stressor regions) have been implemented using epitaxial (epi) semiconductor materials to enhance carrier mobility and improve device performance. Forming a FinFET with stressor regions often implements epitaxially grown silicon (Si) to form raised source and drain features for an n-type device, and epitaxially growing silicon germanium (SiGe) to form raised source and drain features for a p-type device. In the manufacturing process of stressors, further improvements are constantly necessary to satisfy the performance requirement in the scaling down process.